Paper Reading (3)

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Data Tiering in Heterogeneous Memory Systems

  • Heterogeneous memory architectures coupling DRAM with high capacity, low cost, but also lower performance NVM. couple NVM with a smaller amount of DRAM as cache.

  • Contributions:

    1. high performance -> placing some applications data structures in small DRAM
    2. different memory access patterns (sequential, random, pointer chasing)
      • pointer chasing: every operation will occur a cache miss when traveling a list
    3. X-mem -> map objects to data structures
      • automatically placing data-structures in appropriate memory types
    4. According access pattern and automates the task of mapping memory regions of that data structure to DRAM or NVM to optimize performance

  • Design (features)

    1. Using a unique tag (Hash, Tree, Buffer) for each data structures
    2. Binding NVM and DRAM to NUMA node
    3. Select the Solution Type
Dependent Independent
Sequential NA Streaming
Non-sequential Pointer chasing Random

A Write-friendly Hashing Scheme for Non-volatile Memory Systems

  • This is a naive paper, and the idea is trivial

  • This paper introduces a newly hash scheme, which reduce frequency of write operation in NVM

  • Existing Hashing Schemes:

    • Chained Hash
    • Linear Hash
    • 2-choice Hash
    • Cuckoo Hash

  • Hash Scheme Structure

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    8
    | |---| |---| |---| |---| |---| |---| |---| |   Layer-1
      \   /       \   /       \   /       \   /
       | |---------| |---------| |---------| |      Layer-2
          \       /               \       /
           \     /                 \     /
             | |                     | |            Layer-3
                      ...........                   Layer-L
    • every two nearly table items share a item in next layer
    • cache coherence
    • remove some levels in the bottom -> shortening finding path